Company

Uninord is your trusted partner

Uninord Ltd offers tailored digital ASIC, FPGA, NPU and embedded software design services for system houses, IC vendors and technology providers in the communication industry. Typically our customers are global technology leaders in their fields and they require state-of-the-art skill sets and total commitment from their R&D partners.

Uninord is founded in 2005 and located in Oulu, Finland. Our engineers have at least 15 years of experience in working with cutting-edge applications, technology and tools.

A large R&D network

In addition to our own competence, we have an extensive contact network of research and development experts in different technology areas. We also co-operate closely with the research community in areas that support us and our customers. Our experience is particularly strong in communication networks and devices.

"Uninord is known for professional expertise, reliability, flexibility and total commitment on the quality of results and project schedules."

  • System requirements
  • Standards
    • RFC, ITU, IEEE, ETSI, 3GPP, OBSAI
  • HW/SW architecture and partitioning
    • Interfaces both internally and externally
  • HW/SW architecture and partitioning
  • Performance and power analysis
  • Networking
    • Ethernet and IP networking:
      • L2/L3 level
      • IPv4, IPv6
      • MPLS, VPLS, VRF
      • Traffic Management
        • QoS
        • Packet policing, scheduling and forwarding
  • Low power design
    • Architectural design
    • Gated clocks, clocking
    • DVFS
    • Power management
    • Power domain structures
    • Power analysis
  • SoC design
    • Design partition
    • Clocking and resetting for SoC (System on Chip)
    • Block design
    • DFT (Design for testability)
    • Formal verification
    • Synthesis, constraint generation
    • Timing closure, Static timing analysis (STA), floorplan supervision
    • Design verification
    • High level synthesis
    • Design maturity
  • Interfaces
    • High speed serial interfaces (SerDes)
    • DDR, QDR, RLDRAM, FCRAM
    • PCI and PCI-E
  • Emulation
    • Fast prototyping with structured ASICs
    • Rapid prototyping platforms
    • Custom FPGA boards
  • System design for platforms using EZchip NPUs
  • NPU microcode implementation
  • NPU driver sw implementation
  • Platform verification
  • We offer completely out-sourced development projects including
    • Project and quality management
    • Architectural design and specification
    • Product feasibility studies: cost analysis, trade-off's, feature sets
    • All development work including the tools and infrastructure
  • Large experience from different applications, FPGA technologies and design
    • All major vendors
    • Specification, design & verification
    • Network and wireless protocols
    • Clocking and resetting
    • Place and Route
    • Testing
    • Emulation
      • Rapid prototyping platforms
      • Custom FPGA boards
  • SW architecture
  • Platform design
  • Application software
  • With or without OS
  • Hard real time systems
  • One-wire technology for security applications
  • Ultra-low-power processors
  • Embedded software for CPUs in FPGAs
  • ASIC and FPGA HW driver software
    Register chart to RTL generation
    Component library:
  • DSP Filter path creation
    • Channel filter
    • Interpolation filter
    • Decimation filter
    • Multistage filtering
    • DDS
    • FFT
    • Matlab models
  • Special component
    • FIFOs
    • RAM components
  • HSPA hardware accelerator
    • STA and timing closure
    • Formal verification
    • DFT
    • Power management
    • System level verification
  • Prototyping
    • Structured ASIC
    • Rapid prototyping platforms
    • Custom FPGA boards
  • Video codec design
  • LTE hardware accelerator
    • STA and timing closure
    • DFT
    • Vendor IP modules handling
  • Multi core processor
    • System level verification
  • HW-design
  • Board level simulations
  • Base station system level verification
  • OBSAI interface module design
  • System Design:
    • RFC
    • HW/SW architecture
    • L2/L3 level specification
  • ASIC and FPGA design
    • L2/L3
    • Protocol stack handling
      • Ethernet
      • IPvX
    • Flow control
      • Traffic management
      • Traffic classification
      • Hierarchical policing and shaping
    • Interfaces
      • POS-PHY, IX-bus
      • SerDes
      • DDR, QDR, RLDRAM, FCRAM
      • PCI and PCI-E
    • Prototyping with custom FPGA boards
    • Synthesis
    • STA and timing closure
    • Formal verification